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September 2024 term · Computer System Design · BSCS3031

Computer System Design Quiz 2: 1 December 2024 (September 2024 term)

The IIT Madras BS Computer System Design (Computer System Design) Quiz 2 paper sat on 1 Dec 2024, in the September 2024 term: 15 questions for 50 marks in 120 minutes. Every question is below with its answer. Take it as a timed mock test to be marked, or read it through first.

Questions
15
Marks
50
Duration
120 min
MCQ
9
Numerical
6
Take as mock testPractise with answers

Updated

Official paper: IIT M DEGREE AN EXAM QDB2 01 Dec 2024 · No negative marking.

Question 1

+1 markOne correct option

In a J-K flipflop, when J = 1 and K = 0, it toggles the flipflop’s state.

  1. A

    True

  2. B

    False

Show answer

Correct answer

  • B

    False

Question 1 on its own page

Question 2

+1 markOne correct option

A multiplexer is a digital circuit that selects one of the several input signals and forwards it to a single output line.

  1. A

    True

  2. B

    False

Show answer

Correct answer

  • A

    True

Question 2 on its own pageAlso asked in Quiz 2 3 Aug 2025, Quiz 2 16 Aug 2026

Question 3

+1 markOne correct option
  1. A

    True

  2. B

    False

Show answer

Correct answer

  • A

    True

Question 3 on its own page

Question 4

+1 markOne correct option

In a positive-edge-triggered D flipflop, if the D input is 1 and the clock signal transitions from low to high, Q output is 1.

  1. A

    True

  2. B

    False

Show answer

Correct answer

  • A

    True

Question 4 on its own pageAlso asked in End Term 24 Dec 2023, Quiz 2 16 Aug 2026

Question 5

+1 markOne correct option

Sequential circuits do not utilize feedback loops, while combinational circuits do.

  1. A

    True

  2. B

    False

Show answer

Correct answer

  • B

    False

Question 5 on its own pageAlso asked in Quiz 2 3 Aug 2025, Quiz 2 16 Aug 2026

Question 6

+5 marksNumerical answer
Show answer

Correct answer: 1

Question 6 on its own page

Question 7

+5 marksNumerical answer
Show answer

Correct answer: 1010

Question 7 on its own page

Question 8

+4 marksOne correct option
  1. A
  2. B
  3. C
  4. D
Show answer

Correct answer

  • C
Question 8 on its own page

Question 9

+3 marksNumerical answer

If we want to design the given minterm using 3-input NAND gates, what is the minimum number of NAND gates required?

Show answer

Correct answer: 1

Question 9 on its own page

Question 10

+3 marksNumerical answer

If we want to design the given minterm using 2:1 multiplexers, what is the minimum number of multiplexers required?

Show answer

Correct answer: 2

Question 10 on its own page

Question 11

+5 marksOne correct option

Choose the correct option:

  1. A
  2. B
  3. C
  4. D
Show answer

Correct answer

  • D
Question 11 on its own page

Question 12

+5 marksOne correct option
  1. A
  2. B
  3. C
  4. D
  5. E
Show answer

Correct answer

  • B
Question 12 on its own page

Question 13

+5 marksOne correct option
  1. A
  2. B
  3. C
  4. D
Show answer

Correct answer

  • D
Question 13 on its own page

Question 14

+4 marksNumerical answer
Show answer

Correct answer: 0

Question 14 on its own page

Question 15

+6 marksNumerical answer
Show answer

Correct answer: 010

Question 15 on its own page