Question 1
In a J-K flipflop, when J = 1 and K = 1, it toggles the flipflop’s state.
TRUE
FALSE

The IIT Madras BS Computer System Design (Computer System Design) Quiz 2 paper sat on 3 Aug 2025, in the May 2025 term: 15 questions for 50 marks in 120 minutes. Every question is below with its answer. Take it as a timed mock test to be marked, or read it through first.
In a J-K flipflop, when J = 1 and K = 1, it toggles the flipflop’s state.
TRUE
FALSE
Correct answer
TRUE
A multiplexer is a digital circuit that selects one of the several input signals and forwards it to a single output line.
TRUE
FALSE
Correct answer
TRUE
TRUE
FALSE
Correct answer
FALSE
In a positive-edge-triggered D flipflop, if the D input is 1 and the clock signal transitions from low to high, Q output is 0.
TRUE
FALSE
Correct answer
FALSE
Sequential circuits do not utilize feedback loops, while combinational circuits do.
TRUE
FALSE
Correct answer
FALSE
Correct answer
Correct answer
Correct answer
Choose the correct option:
Correct answers
Correct answer: 4
Correct answer: 1001
Correct answer: 1
Correct answer: 111
Answer the given two subquestions based on the given minterm :
If we want to implement the minimized expression using only 2-input NOR gates, what is the minimum number of NOR gates required, given inputs A, B, C, and D?
Correct answer: 1
Answer the given two subquestions based on the given minterm :
If we want to design the given minterm using 2:1 multiplexers, what is the minimum number of multiplexers required?
Correct answer: 2