Question 14
Consider the circuit diagram as shown below. Assuming it was initially cleared to 0, state the output Y for the next 4 clock pulses.
Note: 1st one J-K flipflop 2nd one is D flipflop
0101
1010
1100
0011
Consider the circuit diagram as shown below. Assuming it was initially cleared to 0, state the output Y for the next 4 clock pulses.
Note: 1st one J-K flipflop 2nd one is D flipflop
0101
1010
1100
0011
Correct answer
1010
Question 14 of 15 in the IIT Madras BS Computer System Design (Computer System Design) Quiz 2 paper sat on 3 Dec 2023, in the September 2023 term (IIT M DEGREE AN2 EXAM QDB2 03 Dec 2023). It carries 5 marks.