Computer System Design End Term: 28 April 2024, Set QDB1 (January 2024 term)

In a 4-bit system, the one’s complement of the binary number 1000 is 0111.

A synchronous counter uses a common clock signal to trigger all flipflops, while an asynchronous counter uses the output of each flipflop to trigger the next flipflop.

In a system with 64 unique states, 5 flipflops are sufficient to represent all the states.

In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.

According to Moore’s law, if a computer system has 2 million transistors today,then it will have approximately 32 million transistors in 8 years.

A circuit has four inputs (A, B, C and D) and a single output Y. Y is set to logic one if A is equal to B and C is equal to D, otherwise, Y is set to logic zero. What is the minimum number of minterms to be present in the SOP expression for Y?

What is the minimum number of flipflops required to construct a 4-bit Johnson counter, assuming that all the basic gates are available?

If we implement a simple memory array with 8-bit addressability and address space size of 18 bits, then what would be the total size of the memory (in bits)?

Consider a common bus architecture comprising of memory, and registers X, Y, Z.
The control word format is given below.

What would be the control word if you intend to perform a register transfer from register X to register Y?
Note: Enter the value in hexadecimal format(e.g. 0x24).

Let a processor contain 32 registers in its register file. Consider that the ALU is capable of performing 6 different operations: addition, subtraction, AND, NOT, XOR and XNOR. What is the minimum number of bits required by an instruction in order to perform addition between two operands stored in the register file and then store the result in the register containing the first operand?

Suppose we want to execute a data movement instruction, where we move the data present in register $R_{30}$ to register $R_{23}$.
Instruction: MOV $R_d$, $R_r$
$R_d$: Destination register, $R_r$: Source register
Operands: $0 \le d \le 31, 0 \le r \le 31$
Instruction Format:

What will be the hexadecimal machine code for the instruction?