Question 1
In a 4-bit system, the one’s complement of the binary number 1000 is 0111.
TRUE
FALSE
Question 2
A synchronous counter uses a common clock signal to trigger all flipflops, while an asynchronous counter uses the output of each flipflop to trigger the next flipflop.
TRUE
FALSE
Question 3
In a system with 64 unique states, 5 flipflops are sufficient to represent all the states.
TRUE
FALSE
17 more questions in this paper
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More on the Computer System Design End Term 28 Apr 2024 Set QDB1 paper
The IIT Madras BS Computer System Design (Computer System Design) End Term paper sat on 28 Apr 2024, in the January 2024 term, set QDB1: 20 questions for 50 marks in 180 minutes. The first 3 questions are below. Sign in with Google — it is free — to see the whole paper with its answers and explanations, in learning mode or as a timed mock test.
| Feature | Computer System Design End Term 28 Apr 2024 Set QDB1 at a glance |
|---|---|
| Term | January 2024 term |
| Subject | Computer System Design |
| Course code | BSCS3031 |
| Questions | 20 |
| Marks | 50 |
| Duration | 180 min |
| MCQ | 8 |
| Numerical | 10 |
| Written | 2 |
| Official paper | IIT M DEGREE AN EXAM QDB3 28 Apr 2024 |
| Negative marking | No negative marking. |
| Updated |