Question 1
In a 4-bit system, the one’s complement of the binary number 0001 is 1110.
TRUE
FALSE

The IIT Madras BS Computer System Design (Computer System Design) End Term paper sat on 28 Apr 2024, in the January 2024 term, set QDB3: 20 questions for 50 marks in 180 minutes. Every question is below with its answer. Take it as a timed mock test to be marked, or read it through first.
In a 4-bit system, the one’s complement of the binary number 0001 is 1110.
TRUE
FALSE
Correct answer
TRUE
An asynchronous counter uses a common clock signal to trigger all flipflops, while a synchronous counter uses the output of each flipflop to trigger the next flipflop.
TRUE
FALSE
Correct answer
FALSE
In a system with 65 unique states, 5 flipflops are sufficient to represent all the states.
TRUE
FALSE
Correct answer
FALSE
In a decoder, at any point, exactly one of the outputs is 0 and all the rest are 1s.
TRUE
FALSE
Correct answer
FALSE
According to Moore’s law, if a computer system has 2 million transistors today, then it will have approximately 64 million transistors in 8 years.
TRUE
FALSE
Correct answer
FALSE
Correct answer
Two input XNOR gate as with Y and Z as input
Two input XNOR gate as with X and Y as input
Two input XOR gate as with X and Y as input
Two input NOR gate as with Y and Z as input
Two input NAND gate as with X and Y as input
Correct answer
Two input XOR gate as with X and Y as input
Correct answer
Correct answer: 2
Correct answer: 5
A circuit has four inputs (A, B, C and D) and a single output Y. Y is set to logic one if A is equal to B and C is equal to D, otherwise, Y is set to logic zero. How many maxterms present in the POS expression for Y?
Correct answer: 12
Correct answer: 3
What is the minimum number of flipflops required to construct a 5-bit Johnson counter, assuming that all the basic gates are available?
Correct answer: 4
Correct answer: 1100
If we implement a simple memory array with 8-bit addressability and address space size of 20 bits, then what would be the total size of the memory (in bits)?
Correct answer: 160
Consider a common bus architecture comprising of memory, and registers X, Y, Z.
The control word format is given below.
| Memory | Register X | Register Y | Register Z | ||||
|---|---|---|---|---|---|---|---|
| Read | Write | Input | Output | Input | Output | Input | Output |
What would be the control word if you intend to perform a register transfer from register Y to register X?
Note: Enter the value in hexadecimal format(e.g. 0x12).
Correct answer: 0x24
Let a processor contain 32 registers in its register file. Consider that the ALU is capable of performing 4 different operations: addition, subtraction, AND, and XNOR. What is the minimum number of bits required by an instruction in order to perform addition between two operands stored in the register file and then store the result in the register containing the first operand?
Correct answer: 12
Correct answer: 32
Suppose we want to execute a data movement instruction, where we move the data present in register to register .
Instruction: MOV ,
: Destination register, : Source register
Operands:
Instruction Format:
| 0010 | 11dr | drdr | rdrd |
|---|
What will be the hexadecimal machine code for the instruction?
Correct answer: 0x2FBE
Correct answer: 11111000