Question 7
Two input XNOR gate as with Y and Z as input
Two input XNOR gate as with X and Y as input
Two input XOR gate as with X and Y as input
Two input NOR gate as with Y and Z as input
Two input NAND gate as with X and Y as input
Two input XNOR gate as with Y and Z as input
Two input XNOR gate as with X and Y as input
Two input XOR gate as with X and Y as input
Two input NOR gate as with Y and Z as input
Two input NAND gate as with X and Y as input
Correct answer
Two input XOR gate as with X and Y as input
Question 7 of 20 in the IIT Madras BS Computer System Design (Computer System Design) End Term paper sat on 28 Apr 2024, in the January 2024 term (IIT M DEGREE AN EXAM QDB3 28 Apr 2024). It carries 3 marks.