Question 1
In a 4-bit system, the one’s complement of the binary number 1000 is 1001.
True
False

The IIT Madras BS Computer System Design (Computer System Design) End Term paper sat on 13 Sept 2026, in the May 2026 term, set 1: 20 questions for 50 marks in 180 minutes. Every question is below with its answer. Take it as a timed mock test to be marked, or read it through first.
In a 4-bit system, the one’s complement of the binary number 1000 is 1001.
True
False
Correct answer
False
A synchronous counter triggers all flipflops using a common clock signal, while an asynchronous counter triggers each flipflop using the output of the previous flipflop.
True
False
Correct answer
True
In a system with 63 unique states, 6 flipflops are sufficient to represent all the states.
True
False
Correct answer
True
In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.
True
False
Correct answer
True
According to Moore’s law, if a computer system has 2 million transistors today, then it will have approximately 32 million transistors in 8 years.
True
False
Correct answer
True
The given truth table has to be realized with D flipflop as shown below.
None of these
Correct answer
None of these
Correct answer: 2
Correct answer: 10
Correct answer: 5
Correct answer: 2
A circuit has four inputs: A, B, C, D and one output F. The output F is logic 1 if and only if exactly two of the four inputs are 0. In all other cases, the output is 0. What is the minimum number of maxterms in the product of sums (POS) expression for F?
Correct answer: 8
Correct answer: 1
Consider a mod-14 up counter with an initial state of 0011. What will be the state of the counter after 26 clock pulses?
Correct answer: 0001
Consider the circuit diagram using J-K flipflop as shown below. Assuming it was initially cleared to 0, state the output Y for the next 3 clock pulses.
Correct answer: 101
Consider a 11-bit Johnson counter. What is the total number of unique states it can cycle through?
Correct answer: 22
Consider a common bus architecture comprising of memory, and registers X, Y, Z. The control word format is given below.
What would be the control word if you intend to perform a register transfer from register Z to register X? Note: Enter the value in hexadecimal format(e.g. 0x24). Answers Case Sensitive : No
Correct answer: 0x21
A processor contains 512 registers in its register file. The ALU of the processor supports 8 operations: addition, subtraction, multiplication, division, AND, OR, XOR, and NOR. What is the minimum number of bits required by an instruction to perform a subtraction operation between two operands stored in the register file, and store the result in a third register?
Correct answer: 30
Consider the control word given below.
What is the maximum number of registers that can be stored in the instruction file?
Correct answer: 8
What will be the hexadecimal machine code for the instruction?
Note: Enter the value in hexadecimal format (e.g., 0x2438). Answers Case Sensitive : No
Correct answer: 0x2E2B
Perform 2’s complement subtraction of two numbers A = 23 and B = 47. What is the result of A − B in 8-bit binary format? (Note: Don’t use sign-magnitude form.)
Correct answer: 11101000