Computer System Design End Term: 13 September 2026, Set S2 (May 2026 term)

In a 4-bit system, the one’s complement of the binary number 1000 is 1011.

A synchronous counter triggers all flipflops using a common clock signal, while an asynchronous counter triggers each flipflop using the output of the previous flipflop.

In a system with 65 unique states, 6 flipflops are sufficient to represent all the states.

In a decoder, at any point, exactly one of the outputs is 1 and all the rest are 0s.

According to Moore’s law, if a computer system has 2 million transistors today, then it will have approximately 32 million transistors in 4 years.

The given truth table has to be realized with D flipflop as shown below.

A 1-bit comparator takes two input bits, A and B, and outputs 1 if A = B and 0 otherwise. Using only 2-input NOR gates, what is the minimum number of gates required to design such a comparator circuit?

We want to implement A ⊙ B (A XNOR B) using 2:1 multiplexers. What is the minimum number of 2:1 multiplexers required?

A circuit has four inputs: A, B, C, D and one output F. The output F is logic 1 if and only if exactly two of the four inputs are 0. In all other cases, the output is 0. What is the minimum number of minterms in the Sum of Products (SOP) expression for F?

Inscript Consider a mod-14 up counter with an initial state of 0011. What will be the state of the counter after 25 clock pulses?

Consider the circuit diagram using J-K flipflop as shown below. Assuming it was initially cleared to 0, state the output Y for the next 5 clock pulses.

Consider a 10-bit Johnson counter. What is the total number of unique states it can cycle through?

Consider a common bus architecture comprising of memory, and registers X, Y, Z. The control word format is given below.

What would be the control word if you intend to perform a register transfer from register X to register Z? Note: Enter the value in hexadecimal format (e.g. 0x24). Answers Case Sensitive : No

A processor contains 256 registers in its register file. The ALU of the processor supports 8 operations: addition, subtraction, multiplication, division, AND, OR, XOR, and NOR. What is the minimum number of bits required by an instruction to perform a subtraction operation between two operands stored in the register file, and store the result in a third register?

Consider the control word given below.

What is the maximum number of registers that can be stored in the instruction file?

What will be the hexadecimal machine code for the instruction? Note: Enter the value in hexadecimal format (e.g., 0x2438). Answers Case Sensitive : No

Perform 2’s complement subtraction of two numbers A = 22 and B = 47. What is the result of A − B in 8-bit binary format? (Note: Don’t use sign-magnitude form.)