Question 10
Answer the following question based on given timing diagram.
Given that we only have 3-input NAND gates, what is the minimum number of NAND gates needed to represent the timing diagram above?
Answer the following question based on given timing diagram.
Given that we only have 3-input NAND gates, what is the minimum number of NAND gates needed to represent the timing diagram above?
Correct answer: 1
Question 10 of 14 in the IIT Madras BS Computer System Design (Computer System Design) Quiz 1 paper sat on 29 Oct 2023, in the September 2023 term (IIT M DEGREE AN2 EXAM QPE2 29 Oct 2023). It carries 4 marks.