What will be the output of the given circuit, as shown below? Circuit diagram of chained XOR and XNOR gates

(B) Option figure from the original question paper

(C) Option figure from the original question paper

Figure from the original question paper

(D) Any odd number of inputs are at logic 1

(A) 2 or more inputs are at logic 0

(B) 2 or more inputs are at logic 1

(C) Any odd number of inputs are at logic 0

Figure from the original question paper

(D) Option figure from the original question paper

(A) Option figure from the original question paper

(B) Option figure from the original question paper

(C) Option figure from the original question paper

(E) Option figure from the original question paper

Circuit diagram of a 4x1 multiplexer with a NOT gate

(A) Option figure from the original question paper

(B) Option figure from the original question paper

(C) Option figure from the original question paper

(D) Option figure from the original question paper

(E) Option figure from the original question paper

September 2025 term · Computer System Design · BSCS3031

Computer System Design Quiz 1: 26 October 2025 (September 2025 term)

The IIT Madras BS Computer System Design (Computer System Design) Quiz 1 paper sat on 26 Oct 2025, in the September 2025 term: 12 questions for 50 marks in 120 minutes. Every question is below with its answer. Take it as a timed mock test to be marked, or read it through first.

Questions: 12
Marks: 50
Duration: 120 min
MCQ: 7
Numerical: 5

Take as mock test Practise with answers

Updated 25 Sept 2026

Official paper: IIT M DEGREE AN EXAM QDB2 26 Oct 2025 · No negative marking.

Question 1

+3 marksOne correct option

A
AND, NOT
B
OR, XOR
C
AND, OR
D
NOT, AND
E
NOT, XOR
F
XOR, OR
G
XOR, AND

Show answer

Correct answer

G
XOR, AND

Question 1 on its own page

Question 2

+4 marksOne correct option

If (234)a = (143)b, where a and b are the bases of the respective numbers, what are the values of a and b?

A
a = 3, b = 4
B
a = 4,b = 5
C
a = 5, b = 6
D
a = 6, b = 7
E
a = 7, b = 8

Show answer

Correct answer

B
a = 4,b = 5

Question 2 on its own page

Question 3

+4 marksOne correct option

What will be the output of the given circuit, as shown below?

A
—
B
C
D
—

Show answer

Correct answer

A
—

Question 3 on its own page

Question 4

+4 marksOne correct option

A
2 or more inputs are at logic 0
B
2 or more inputs are at logic 1
C
Any odd number of inputs are at logic 0
D
Any odd number of inputs are at logic 1

Show answer

Correct answer

D
Any odd number of inputs are at logic 1

Question 4 on its own page

Question 5

+4 marksOne correct option

Show answer

Correct answer

Question 5 on its own page

Question 6

+5 marksOne correct option

Show answer

Correct answer

Question 6 on its own page

Question 7

+5 marksOne correct option

Consider the circuit shown below. Given that the inputs are supplied uniformly random,what is the probability of the output Y being at logic 0?

A
0.75
B
0.50
C
0.33
D
0.25
E
1

Show answer

Correct answer

B
0.50

Question 7 on its own page

Question 8

+3 marksNumerical answer

Given that NOT, 2-input AND/OR gates have delays of 1 ns, what will be the maximum delay of a 3x8 Decoder circuit?
Note: if the answer is 1 ns, write 1.

Show answer

Correct answer: 3

Question 8 on its own page

Question 9

+3 marksNumerical answer

What is the minimum number of bits required to represent number (128)10 in binary ?

Show answer

Correct answer: 8

Question 9 on its own page

Question 10

+5 marksNumerical answer

Show answer

Correct answer: 2

Question 10 on its own page

Question 11

+5 marksNumerical answer

Consider the circuit diagram shown below.

Given that we only have 4:1 mux gates, what is the minimum number of mux gates needed to represent the circuit diagram above?

Show answer

Correct answer: 1

Question 11 on its own page

Question 12

+5 marksNumerical answer

Answer the given question based on given timing diagram.

Given that we only have 2-input NOR gates, what is the minimum number of NOR gates needed to represent a circuit with an output timing diagram same as Y?

Show answer

Correct answer: 2

Question 12 on its own page